FPGA 系统实战 · 03 运行第一笔 DDR 往返与软件校验

/* Original teaching application; identity-mapped standalone Cortex-A9 only.
 * HOST_TEST executes this exact orchestration with a cache/DDR behavioral model. */
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#define CAP 65536U
static uint8_t tx[CAP] __attribute__((aligned(64)));
static uint8_t rx[CAP] __attribute__((aligned(64)));
#ifdef HOST_TEST
#include "platform_host.h"
#else
#include "platform_hw.h"
#endif
static int transfer(unsigned n,unsigned seed) {
 for(unsigned i=0;i<n;i++)tx[i]=(uint8_t)(i*17+seed);
 memset(rx,0xcc,CAP);
 uint64_t begin=now();
 clean(tx,CAP); clean(rx,CAP); barrier();
 uint64_t start=now();
 if(submit_rx(rx,n)||submit_tx(tx,n))return fail("SUBMIT");
 while(busy()){
  if(errors())return fail("DMA_ERROR");
  if(now()-start>ticks_per_second())return fail("DMA_TIMEOUT");
 }
 if(errors())return fail("DMA_ERROR");
 uint64_t done=now();
 barrier(); invalidate(rx,CAP); barrier();
 uint64_t acquired=now();
 if(actual()!=n)return fail("LENGTH_MISMATCH");
 for(unsigned i=0;i<n;i++)if(rx[i]!=(uint8_t)(tx[i]^0xa5)){
  printf("mismatch offset=%u expected=%02x actual=%02x\n",i,(unsigned)(tx[i]^0xa5),(unsigned)rx[i]);
  return fail("DATA_MISMATCH");
 }
 printf("PASS bytes=%u actual=%u dma_ticks=%llu ownership_ticks=%llu timer_hz=%llu\n",
 n,actual(),(unsigned long long)(done-start),(unsigned long long)(acquired-begin),
 (unsigned long long)ticks_per_second());
 return 0;
}
int main(void){
 if(setup())return 1;
 const unsigned sizes[]={64,4094,4096,65536};
 for(unsigned s=0;s<4;s++)for(unsigned rep=0;rep<3;rep++)
  if(transfer(sizes[s],3+rep))return 1;
 puts("PASS suite=12 transfers; bytes checked; one TLAST per transfer");return 0;
}

/* 目标驱动调用：先 RX，后 TX */
XAxiDma_SimpleTransfer(&dma, (UINTPTR)rx, n, XAXIDMA_DEVICE_TO_DMA);
XAxiDma_SimpleTransfer(&dma, (UINTPTR)tx, n, XAXIDMA_DMA_TO_DEVICE);
/* 每次调用必须检查返回值；完整封装会检查错误、超时及实际长度。 */